2019-12-07 11:11:50 -05:00
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#include <hal/nrf_gpio.h>
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2020-01-19 13:47:49 -05:00
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#include <hal/nrf_spim.h>
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2019-12-07 11:11:50 -05:00
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#include "SpiMaster.h"
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#include <algorithm>
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2019-12-07 11:11:50 -05:00
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using namespace Pinetime::Drivers;
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SpiMaster* spiInstance;
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SpiMaster::SpiMaster(const SpiMaster::SpiModule spi, const SpiMaster::Parameters ¶ms) :
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spi{spi}, params{params} {
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spiInstance = this;
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}
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bool SpiMaster::Init() {
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/* Configure GPIO pins used for pselsck, pselmosi, pselmiso and pselss for SPI0 */
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nrf_gpio_pin_set(params.pinSCK);
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nrf_gpio_cfg_output(params.pinSCK);
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nrf_gpio_pin_clear(params.pinMOSI);
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nrf_gpio_cfg_output(params.pinMOSI);
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nrf_gpio_cfg_input(params.pinMISO, NRF_GPIO_PIN_NOPULL);
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nrf_gpio_cfg_output(params.pinCSN);
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pinCsn = params.pinCSN;
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switch(spi) {
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case SpiModule::SPI0: spiBaseAddress = NRF_SPIM0; break;
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case SpiModule::SPI1: spiBaseAddress = NRF_SPIM1; break;
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default: return false;
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}
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/* Configure pins, frequency and mode */
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NRF_SPIM0->PSELSCK = params.pinSCK;
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NRF_SPIM0->PSELMOSI = params.pinMOSI;
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NRF_SPIM0->PSELMISO = params.pinMISO;
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nrf_gpio_pin_set(pinCsn); /* disable Set slave select (inactive high) */
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uint32_t frequency;
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switch(params.Frequency) {
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case Frequencies::Freq8Mhz: frequency = 0x80000000; break;
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default: return false;
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}
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NRF_SPIM0->FREQUENCY = frequency;
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uint32_t regConfig = 0;
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switch(params.bitOrder) {
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case BitOrder::Msb_Lsb: break;
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case BitOrder::Lsb_Msb: regConfig = 1;
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default: return false;
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}
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switch(params.mode) {
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case Modes::Mode0: break;
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case Modes::Mode1: regConfig |= (0x01 << 1); break;
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case Modes::Mode2: regConfig |= (0x02 << 1); break;
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case Modes::Mode3: regConfig |= (0x03 << 1); break;
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default: return false;
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}
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setup_workaround_for_ftpan_58(NRF_SPIM0, 0, 0);
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NRF_SPIM0->CONFIG = regConfig;
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NRF_SPIM0->EVENTS_ENDRX = 0;
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NRF_SPIM0->EVENTS_ENDTX = 0;
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NRF_SPIM0->EVENTS_END = 0;
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NRF_SPIM0->INTENSET = ((unsigned)1 << (unsigned)6);
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NRF_SPIM0->INTENSET = ((unsigned)1 << (unsigned)1);
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NRF_SPIM0->INTENSET = ((unsigned)1 << (unsigned)19);
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NRF_SPIM0->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos);
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NRFX_IRQ_PRIORITY_SET(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn,6);
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NRFX_IRQ_ENABLE(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn);
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return true;
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}
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void SpiMaster::setup_workaround_for_ftpan_58(NRF_SPIM_Type *spim, uint32_t ppi_channel, uint32_t gpiote_channel) {
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// Create an event when SCK toggles.
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NRF_GPIOTE->CONFIG[gpiote_channel] = (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) |
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(spim->PSEL.SCK << GPIOTE_CONFIG_PSEL_Pos) |
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(GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos);
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// Stop the spim instance when SCK toggles.
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NRF_PPI->CH[ppi_channel].EEP = (uint32_t) &NRF_GPIOTE->EVENTS_IN[gpiote_channel];
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NRF_PPI->CH[ppi_channel].TEP = (uint32_t) &spim->TASKS_STOP;
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NRF_PPI->CHENSET = 1U << ppi_channel;
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}
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void SpiMaster::irqStarted() {
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if(busy) {
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auto s = currentBufferSize;
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if(s > 0) {
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auto currentSize = std::min((size_t)255, s);
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NRF_SPIM0->TXD.PTR = (uint32_t) currentBufferAddr;
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NRF_SPIM0->TXD.MAXCNT = currentSize;
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NRF_SPIM0->TXD.LIST = 0;
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currentBufferAddr += currentSize;
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currentBufferSize -= currentSize;
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NRF_SPIM0->RXD.PTR = (uint32_t) 0;
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NRF_SPIM0->RXD.MAXCNT = 0;
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NRF_SPIM0->RXD.LIST = 0;
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if(repeat == 0)
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NRF_SPIM0->SHORTS = 0;
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return;
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}else {
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if(repeat > 0) {
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repeat = repeat -1;
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currentBufferAddr = bufferAddr;
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currentBufferSize = bufferSize;
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s = currentBufferSize;
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auto currentSize = std::min((size_t)255, s);
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NRF_SPIM0->TXD.PTR = (uint32_t) currentBufferAddr;
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NRF_SPIM0->TXD.MAXCNT = currentSize;
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NRF_SPIM0->TXD.LIST = 0;
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currentBufferAddr += currentSize;
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currentBufferSize -= currentSize;
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NRF_SPIM0->RXD.PTR = (uint32_t) 0;
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NRF_SPIM0->RXD.MAXCNT = 0;
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NRF_SPIM0->RXD.LIST = 0;
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}
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}
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}
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}
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void SpiMaster::irqEnd() {
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if(busy) {
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if(repeat == 0 && currentBufferSize == 0) {
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nrf_gpio_pin_set(pinCsn);
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busy = false;
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}
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}
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}
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bool SpiMaster::Write(const uint8_t *data, size_t size, size_t r) {
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if(data == nullptr) return false;
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while(busy) {
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asm("nop");
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}
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if(size == 1) {
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setup_workaround_for_ftpan_58(NRF_SPIM0, 0,0);
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NRF_SPIM0->INTENCLR = (1<<6);
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NRF_SPIM0->INTENCLR = (1<<1);
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NRF_SPIM0->INTENCLR = (1<<19);
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} else {
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NRF_GPIOTE->CONFIG[0] = 0;
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NRF_PPI->CH[0].EEP = 0;
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NRF_PPI->CH[0].TEP = 0;
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NRF_PPI->CHENSET = 0;
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NRF_SPIM0->INTENSET = (1<<6);
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NRF_SPIM0->INTENSET = (1<<1);
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NRF_SPIM0->INTENSET = (1<<19);
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}
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nrf_gpio_pin_clear(pinCsn);
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currentBufferAddr = bufferAddr = (uint32_t)data;
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currentBufferSize = bufferSize = size;
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repeat = r;
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busy = true;
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if(repeat > 0)
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NRF_SPIM0->SHORTS = (1<<17);
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auto currentSize = std::min((size_t)255, bufferSize);
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NRF_SPIM0->TXD.PTR = bufferAddr;
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NRF_SPIM0->TXD.MAXCNT = currentSize;
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NRF_SPIM0->TXD.LIST = 0;
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currentBufferSize -= currentSize;
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currentBufferAddr += currentSize;
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NRF_SPIM0->RXD.PTR = (uint32_t) 0;
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NRF_SPIM0->RXD.MAXCNT = 0;
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NRF_SPIM0->RXD.LIST = 0;
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NRF_SPIM0->EVENTS_END = 0;
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NRF_SPIM0->TASKS_START = 1;
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if(size == 1) {
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while (NRF_SPIM0->EVENTS_END == 0);
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busy = false;
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nrf_gpio_pin_set(pinCsn);
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}
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return true;
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}
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bool SpiMaster::GetStatusEnd() {
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return (bool)*(volatile uint32_t *)((uint8_t *)spiBaseAddress + (uint32_t)NRF_SPIM_EVENT_END);
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}
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bool SpiMaster::GetStatusStarted() {
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return (bool)*(volatile uint32_t *)((uint8_t *)spiBaseAddress + (uint32_t)NRF_SPIM_EVENT_STARTED);
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}
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void SpiMaster::Sleep() {
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while(NRF_SPIM0->ENABLE != 0) {
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NRF_SPIM0->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos);
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}
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nrf_gpio_cfg_default(params.pinSCK);
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nrf_gpio_cfg_default(params.pinMOSI);
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nrf_gpio_cfg_default(params.pinMISO);
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nrf_gpio_cfg_default(params.pinCSN);
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}
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void SpiMaster::Wakeup() {
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Init();
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}
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void SpiMaster::Wait() {
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while(busy) {
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asm("nop");
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}
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}
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